Peak detectors are used for detecting and holding the maximum or minimum value of a input signal, such as a sinusoidal signal, a data pulse, etc. Referring to FIG. 1, a conventional peak detector 10 comprises an analog comparator 12 that compares an input signal with a voltage stored on a capacitor C.sub.HOLD coupled to an output of the peak detector 10.
In the case of a positive peak detector, the input signal is supplied to the non-inverting input of the comparator 12, whereas the capacitor voltage is supplied to the inverting input of the comparator 12. If the input signal exceeds the capacitor voltage, the output of the comparator 12 closes a switch 14 connected between the capacitor C.sub.HOLD and a voltage source Vs. The switch 14 may be a MOSFET or another active device controlled by the output of the comparator 12 applied to a control gate or electrode. The closed condition of the switch 14 corresponds to the active state of the active device.
When the switch 14 is closed, the charge on the capacitor C.sub.HOLD is increased until the capacitor voltage exceeds the input signal. When this occurs, the output of the comparator 12 changes, opening the switch 14 or shutting off the active device that represents the switch 14. As a result, the capacitor voltage is "locked" at a level corresponding to the peak value of the input signal. FIG. 2 is a timing diagram illustrating the output and input signals of the peak detector 10.
However, due to component mismatches, each comparator has its unique inherent offset voltage Voff. The offset voltage may be represented by a voltage source Vosc connected to the non-inverting terminal of the comparator 12. Voltage Vout at the output of the peak detector 10 will be in error by the voltage amount introduced by the voltage source Vosc: EQU Vout=Vin.(max)+Vosc.
Thus, the accuracy of the peak detector is affected by the offset voltage. As the magnitude of the offset voltage is unique for each peak detector due to unique component mismatches, the offset voltage effects are not predictable and therefore difficult to eliminate.
In peak detection applications where high accuracy is required, and the magnitude and polarity of the offset voltage are unknown, it would be desirable to provide offset compensation circuitry for removing the offset.
Further, a unity gain buffer, or other such circuitry, may be required to drive any output of a peak detector where a capacitor coupled to the output can be discharged. For example, a unity gain buffer 16 is required to drive the output of the peak detector 10 shown in FIG. 1 to prevent the discharge of the capacitor C.sub.HOLD. Such an output buffer introduces additional offset represented by a voltage source Vos connected to an input of the buffer 16. As a result, the accuracy of the peak detector 10 would be further affected by offset effects caused by the output buffer 16.
Thus, to improve the accuracy of the peak detector, it would be desirable to provide an offset compensation arrangement that eliminates offset effects caused by the output buffer.